text-only page produced automatically by LIFT Text Transcoder Skip all navigation and go to page contentSkip top navigation and go to directorate navigationSkip top navigation and go to page navigation
National Science Foundation
Search  
Awards
design element
Search Awards
Recent Awards
Presidential and Honorary Awards
About Awards
Grant Policy Manual
Grant General Conditions
Cooperative Agreement Conditions
Special Conditions
Federal Demonstration Partnership
Policy Office Website


Award Abstract #0210585
NIRT: Merged CMOS/Molecular Integrated Circuit (Mol-MOS) Fabrication, Analysis and Design


NSF Org: ECCS
Division of Electrical, Communications and Cyber Systems
divider line
divider line
Initial Amendment Date: July 25, 2002
divider line
Latest Amendment Date: January 22, 2004
divider line
Award Number: 0210585
divider line
Award Instrument: Standard Grant
divider line
Program Manager: Rajinder P. Khosla
ECCS Division of Electrical, Communications and Cyber Systems
ENG Directorate for Engineering
divider line
Start Date: August 1, 2002
divider line
Expires: July 31, 2006 (Estimated)
divider line
Awarded Amount to Date: $1062000
divider line
Investigator(s): Lloyd Harriott lrharriott@virginia.edu (Principal Investigator)
John Bean (Co-Principal Investigator)
Lin Pu (Co-Principal Investigator)
Mircea Stan (Co-Principal Investigator)
Andrew Hillier (Former Co-Principal Investigator)
divider line
Sponsor: University of Virginia Main Campus
P.O. BOX 400195
CHARLOTTESVILLE, VA 22904 434/924-4270
divider line
NSF Program(s): NANOSCALE: INTRDISCPL RESRCH T,
ELECT, PHOTONICS, & DEVICE TEC
divider line
Field Application(s): 0206000 Telecommunications
divider line
Program Reference Code(s): OTHR, 9251, 7237, 1674, 0000
divider line
Program Element Code(s): 1674, 1517

ABSTRACT

This proposal was received in response to Nanoscale Science and Engineering initiative, NSF 01-157, category NIRT. This program addresses the issues of fabrication and integration of molecular devices with conventional electronic technology. The research team will address nanoelectronics from a comprehensive viewpoint by considering how nano-devices and nano-circuits can be assembled, modeled and designed with the requirements of large-scale integration and manufacturability in mind. For one, we will examine new combinations of electrode and active materials that are more compatible with conventional device and processing technologies. Modern integrated circuits use a variety of metals (Al, Cu, Ta, W, Ti, etc.) and insulators (SiO2, SiN, etc.) in multilevel metalization schemes that result in a complex 2.5 dimensional arrangement of contacts and wires. In contrast, most molecular devices use planar arrangements of Au electrodes that are not compatible with MOS-based electronics. This problem might be overcome by designing organic molecules with end groups engineered to attach only to Cu electrodes. These would ultimately be mated with metal electrode structures formed using state-of-the-art film deposition/growth techniques and electron beam lithography. These structures would incorporate sacrificial insulating spacer layers. Near the end of the process sequence, the insulating layers would be etched away leaving pockets that by their shape, size and Cu endpoints, provide an ideal "home" for the target molecule. The completed template could then be rinsed in a solution containing these molecules, adding them to the structure. Since the volatile organics would not be subject to high temperature processing, this would provide a viable means of adding molecular electronic devices to underling microelectronic circuits.

We will also develop black-box models of molecular devices. These models are essential if one is to anticipate novel computing architectures where molecular devices may function far differently from modern transistors, and where optimized circuit design my entail radically different patterns of device interconnection. Presently, such models do not exist but are absolutely required to allow design with nanodevices at higher levels of abstraction.

A major part of our effort will be dedicated to education and outreach. The subject of nano-electronics is highly interdisciplinary and does not fall within the normal pedagogical bounds of engineering and scientific disciplines. We will thus offer a compelling 3D animation-based website (building on our existing expertise) and a graduate level web-published "Frontiers of Nanoscience" course emphasizing the fundamentals of nano-device operation and their giga-scale integration.

 

Please report errors in award information by writing to: awardsearch@nsf.gov.

 

 

Print this page
Back to Top of page
  Web Policies and Important Links | Privacy | FOIA | Help | Contact NSF | Contact Web Master | SiteMap  
National Science Foundation
The National Science Foundation, 4201 Wilson Boulevard, Arlington, Virginia 22230, USA
Tel: (703) 292-5111, FIRS: (800) 877-8339 | TDD: (800) 281-8749
Last Updated:
April 2, 2007
Text Only


Last Updated:April 2, 2007