360 HUNTINGTON AVE
COMMS, CIRCUITS & SENS SYS
Program Reference Code(s):
Program Element Code(s):
EAGER: Integrated Self-Calibrated Analog Front-End for Biopotential and Bioimpedance Measurements
Intellectual Merit: This research addresses the need for enhancements of integrated analog circuits to permit reliable measurements of biosignals over prolonged time periods. The all-encompassing goals are to realize input impedance boosting and on-chip calibration in order to enable the use of dry electrodes as well as to alleviate the impact of manufacturing process variations of complementary metal-oxide-semiconductor fabrication technologies. A prototype chip will be fabricated and tested to experimentally validate the proposed concepts while meeting or exceeding state-of-the-art performance specifications. The instrumentation amplifier in the system will be designed with a feedback loop that boosts the input impedance for measurements of biopotentials and bioimpedances with dry electrodes. Extra circuitry will also be developed to automatically optimize the suppression of undesired common-mode interference signals at the input. The auxiliary analog test signal generation circuits and digital calibration circuits will be integrated together on the same chip as the analog front-end system.
Broader Impacts: This project will give rise to circuit design methods that enable long-term brain signal acquisitions with dry electrodes interfaced to highly integrated chips. The results will improve systems for monitoring of brain signals during epilepsy diagnosis, drowsiness detection, and the recognition of intentions in order to allow an incapacitated patient to communicate or to control robots. Since the same type of instrumentation amplifier and similar analog front-end architectures are frequently found in measurement circuits for bioimpedances, the outcomes of this research will also be applicable to the design of integrated circuits for cancer and injury detection, movement sensing of body organs, and implantable pacemakers. Due to the reliability enhancement prospects with the proposed built-in testing and calibration techniques, the work can potentially provide a viable path for sustainable performance improvements of portable and implantable medical devices through the use of advanced fabrication technologies with high process variations. Knowledge obtained from this project will be integrated into graduate and undergraduate education, and it will be shared publicly to contribute to the advancement of design and test engineering methods in the semiconductor industry.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
Note: When clicking on a Digital Object Identifier (DOI) number, you will be taken to an external site maintained by the publisher. Some full text articles may not yet be available without a charge during the embargo (administrative interval).
Some links on this page may take you to non-federal websites. Their policies may differ from this site.
Y. Ni and M. Onabajo. "A low-power temperature-compensated CMOS relaxation oscillator," Analog Integrated Circuits and Signal Processing, v.79, 2014, p. 309.