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High-End Computing University Research Activity  (HECURA)

This program has been archived.

CONTACTS

Name Email Phone Room
Almadena  Y. Chtchelkanova achtchel@nsf.gov (703) 292-8910   
Krishna  Kant kkant@nsf.gov (703) 292-4776   
Frank  Olken folken@nsf.gov (703) 292-8930   
Abani  Patra apatra@nsf.gov (703) 292-8970   

Additional Program Contact:

Velma Lawson, Integrative Activities Specialist, Division of Computing and Communication Foundations, telephone: (703) 292-8910, email: vlawson@nsf.gov

PROGRAM GUIDELINES

Announcement  09-530

Important Information for Proposers

A revised version of the NSF Proposal & Award Policies & Procedures Guide (PAPPG) (NSF 15-1), is effective for proposals submitted, or due, on or after December 26, 2014. The PAPPG is consistent with, and, implements the new Uniform Administrative Requirements, Cost Principles, and Audit Requirements for Federal Awards (Uniform Guidance) (2 CFR 200). NSF anticipates release of the PAPPG in the Fall of 2014. Please be advised that, depending on the specified due date, the guidelines contained in NSF 15-1 may apply to proposals submitted in response to this funding opportunity.

DUE DATES

Archived

SYNOPSIS

High-performance computing is increasingly essential to progress in science and engineering.  Contemporary high-end computing (HEC) systems often comprising of tens- to hundreds-of-thousands of processors allow researchers to study complex problems that were previously intractable.   However, emerging data-intensive scientific challenges and opportunities demand more of HEC systems.  For example, observation- and simulation-driven applications require higher throughput input/output (I/O) capabilities, large data storage capacities, and tools for efficiently finding, processing, organizing and moving data.  Data-management challenges also include the need to access large volumes of data produced by different applications, in numerous locations, and in various formats.

Although storage capacity and processing power are growing rapidly, increases in data bandwidth and access times are not keeping pace.  In fact, the advent of multicore processors has resulted in a decrease in memory and bandwidth per core. The performance gap between HEC processing power and storage device performance demands advances in massively parallel I/O systems to maintain the throughput of applications. The ability to efficiently map I/O operations between millions of distributed memories and hundreds-of-thousands of storage devices is also a formidable problem that calls for research.

Accordingly, in 2009, the High-End Computing University Research Activity (HECURA) program invites research and education proposals in the areas of I/O, file and storage systems design for efficient, high-throughput data storage, retrieval and management in cases where HEC systems comprise hundreds-of-thousands to millions of processors.  Research areas of interest include, but are not limited to:

  • I/O architectures and I/O middleware;
  • archives/backups as extensions to file systems;
  • file systems research and file systems-related protocols;
  • metadata research;
  • access methods;
  • data management systems;
  • security;
  • novel storage devices for the I/O stack;
  • Quality of Service;
  • management, and reliability and availability at scale (RAS);
  • hardware and software tools for design and simulation of I/O, file and storage systems; and
  • efficient benchmarking, tracing, performance measurement and tuning tools of I/O, file and storage systems.

THIS PROGRAM IS PART OF

Additional Funding Opportunities for the CNS Community

Additional Funding Opportunities for the IIS Community


What Has Been Funded (Recent Awards Made Through This Program, with Abstracts)

Map of Recent Awards Made Through This Program



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