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Routing congestion on integrated circuits is one of the physical limits to computation.
The image on the right shows the physical placement of a large, integrated circuit with logic gates in blue and "packing peanuts" (spacers) in red. The "heat maps" on the left show wiring congestion--green and yellow show sparse connectivity, but red and purple show insufficient routing resources. Routing congestion is one of the manifestations of physical limits to computation. The progression of images illustrates how computer-aided design tools address routing congestion by revising circuit placement.
Credit: Myung-Chul Kim, Jin Hu, Igor L. Markov; University of Michigan
Images credited to the National Science Foundation, a federal agency, are in the public domain. The images were created by employees of the United States Government as part of their official duties or prepared by contractors as "works for hire" for NSF. You may freely use NSF-credited images and, at your discretion, credit NSF with a "Courtesy: National Science Foundation" notation.
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