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NSF 22-120

Dear Colleague Letter: Enhancing Engineering Technology and Advanced Semiconductor Manufacturing Technician Education (ETSTE)

September 8, 2022

Dear Colleagues:

Leading the world in discovery and innovation, science, technology, engineering, and mathematics (STEM) talent development, and the delivery of benefits from research is the objective of the National Science Foundation (NSF). The 2022-2026 Strategic Plan [1] highlights the importance of U.S. global competitiveness and its critical dependence on the readiness of the Nation’s science, technology, engineering, and mathematics (STEM) workforce. To achieve this goal, the NSF invests in programs that directly advance this workforce. As part of this effort, this Dear Colleague Letter (DCL) announces a cooperative activity between NSF and Intel Corporation to stimulate transformative approaches to improve and impact advanced manufacturing technician education and workforce development for (a) semiconductor manufacturing and/or (b) semiconductor manufacturing and design.

As part of this effort, this Dear Colleague Letter announces new award opportunities in two programs: the Advanced Technological Education (ATE) program and the Scholarships in Science, Technology, Engineering, and Mathematics (S-STEM) that build on or leverage strong industry-academic partnerships to strengthen the semiconductor manufacturing workforce. Efforts will advance and support the development of a skilled STEM talented technical workforce in engineering technology, advanced semiconductor manufacturing, and/or semiconductor manufacturing and design. With a focus on institutions of higher education providing technician programs and degree pathways, this new initiative will support efforts to create new programs, courses, curricula, and certificates; adapt and implement evidence-based instructional and inclusive practices, materials, and experiential learning activities; develop and/or integrate industry standards into programs of study and courses; foster skilled educators; and investigate activities and factors associated with student performance.


Over the years, the semiconductor industry has become a major component of the global economy. To support this growth, there is critical need to expand domestic “semiconductor research and development, design, and manufacturing” [2]. Recognizing the talent shortage in the domestic semiconductor industry, this DCL is a targeted initiative to educate and prepare the nation’s current and future semiconductor workforce and to advance inclusive and equitable STEM education opportunities. To accomplish this objective, the DCL is a call to action to advance innovative and evidence-based practices and curricular resources in the education and training of the skilled semiconductor industry technical workforce.

This Dear Colleague Letter encourages submission of proposals through NSF programs that support workforce development efforts at institutions of higher education:

Proposers are encouraged to explore a wide range of innovations that are research-informed and result in field-tested outcomes and products that enhance engineering technology and advanced manufacturing education and training in the areas of semiconductor manufacturing and/or semiconductor manufacturing and design. Possible approaches to respond to this initiative that meet the requirements of the relevant program are listed below, but are not limited to the following:

  1. To increase training opportunities through experiential education.
  2. To increase the education/training and scholarships for students, which includes the creation of new programs of study, courses, and materials as well as the adaptation and implementation of existing efforts.
  3. To increase the adaptation and implementation of evidence-based curricula and pedagogies in those fields, though the training on curricula or pedagogy for faculty and/or secondary teachers, better integration and encapsulation of curricula for sharing, broader dissemination networks, collaboration and networking opportunities.
  4. To align and incorporate industry, professional, technical standards in teaching and learning and/or incorporating career skills into training, education, thereby securing them to career pathways.
  5. To integrate systematic approaches to advance inclusive and equitable STEM education practices.
  6. To build the capacity for institutions’ rapid response to the changes in the STEM oriented skilled technician workforce.
  7. To investigate student success in academia and/or in the workforces in semiconductors and/or associated fields.

Before submission, proposers are encouraged to discuss their ideas with relevant program officers, named at the end of this document. Proposals should be prepared and submitted following the guidance in the NSF Proposal & Award Policies & Procedures Guide (PAPPG) and also must adhere to the due dates and guidance specified in the program solicitation to which the proposal will be submitted.

Organizations submitting proposals are encouraged to highlight the request for funds supporting approaches associated with transformative approaches to improving and impacting the advancement of education of skilled technicians in semiconductor manufacturing only and/or semiconductor manufacturing and design in the Project Summary, the Project Description, and the Budget Justification. When responding to this DCL, please include "ETSTE DCL:" at the beginning of the proposal title or immediately following any solicitation specific title prefix. Funding levels will be based on guidelines provided in the respective program solicitation.

NSF is particularly interested in proposals from Minority Serving Institutions (including Hispanic Serving Institutions, Historically Black Colleges and Universities, Tribal Colleges and Universities, and Alaska Native and Native Hawaiian Serving Institutions), in which groups historically underrepresented in STEM are showing increased interest in advanced technology careers.

Submission and Review

This DCL does not constitute a new competition or new program. Proposals submitted in response to this DCL should be prepared and submitted in accordance with the instructions, requirements, and deadlines specified in the respective (ATE or S-STEM) program solicitation. In accordance with NSF policy (PAPPG II.C.2.j), Intel and its staff are ineligible to be involved in the development of any proposals submitted to any Program funding opportunity described in this Dear Colleague Letter, including as unfunded collaborators, via letters of collaboration, or support or via any other means.

Proposals submitted in response to this DCL must include "ETSTE DCL:" at the beginning of the proposal title or immediately following any solicitation specific title prefix. Any and all proprietary or privileged information must be included in the “single copy document” section of the proposal in or, which will not be shared with reviewer or Intel representatives.

The review will be conducted using the standard NSF merit review process (with the proposals being evaluated in accordance with the standard National Science Board-approved merit review criteria of intellectual merit and broader impacts including any funding opportunity-specific review criteria), policies, and procedures. Industry experts with manufacturing experience will be included in panels focused on workforce development.

After completion of the merit review process, NSF may share with Intel representatives proposals and corresponding unattributed reviews and panel summaries submitted in response to this DCL. NSF will take into consideration input from Intel representatives prior to making final funding decisions, but NSF will retain final authority for making all award decisions.

Awardees funded under this DCL will have the opportunity to engage with Intel Corporation, including access to Intel subject matter experts. Once the Program awards have been issued, Intel may engage with the awardees in the following ways:

  • Intel will have regular engagement and collaboration with Principal Investigators
  • Intel will receive copies of reports from the awardees
  • Intel may offer to provide resources and opportunities (e.g., seminars, internships) to all awardees although awardees will not be required to use Intel’s offered contributions.


[1] National Science Foundation, Leading the World in Discovery and Innovation, STEM Talent Development and the Delivery of Benefits from Research: NSF Strategic Plan for Fiscal Years 2022-2026.

[2] Semiconductor Industry Association, May 2021. Chipping In: The positive Impact of the Semiconductor Industry on the American Workforce and How Federal Industry Incentives will increase Domestic Jobs (conducted by Oxford Economics).

Additional Resources

American Association of Community Colleges, Fast Facts 2020.

Foley D. Milan L., Hamrick, K: National Center for Science and Engineering Statistics 2020. The Increasing Role of Community Colleges among Bachelor’s Degree Recipients: Findings from the 2019 National Survey of College Graduates.

National Academies of Sciences, Engineering, and Medicine (NASEM), “Building America’s Skilled Technical Workforce (Washington, D.C.: The National Academies Press, 2017:

National Science Foundation. The Skilled Technical Workforce: Crafting America’s Science & Engineering Enterprise.

National Science Board. National Science Foundation. 2020. Science and Engineering Indicators 2020: The State of U.S. Science and Engineering. NSB-2020-1. Alexandria, VA.

Intel Manufacturing and Facilities Career Opportunities.

For more information, please contact the Directorate of Education and Human Resource, Division of Undergraduate Education.

Program Contacts


James L. Moore III
Assistant Director, Directorate for Education and Human Resources

Erwin Gianchandani
Assistant Director, Directorate for Technology, Innovation and Partnerships